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Gate array
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#	Item
771	FPGA -based Safety Separation Design Flow for Rapid IEC[removed]Certification Add to Reading List Source URL: www.altera.com Language: English - Date: 2014-06-24 11:01:32 Electronic design Electronic design automation Safety Field-programmable gate array Altera Nios II Semiconductor intellectual property core Logic synthesis Disk partitioning Electronic engineering Electronics Digital electronics
772	External Memory Interfaces in Arria 10 Devices Add to Reading List Source URL: www.altera.com Language: English - Date: 2013-12-02 03:56:37 Electronic engineering Altera Synchronous dynamic random-access memory DDR3 SDRAM DDR4 SDRAM Dynamic random-access memory Field-programmable gate array SDRAM Computer hardware Computing
773	HPS-FPGA Bridges[removed] Add to Reading List Source URL: www.altera.com Language: English Reconfigurable computing Electronics Altera Bitstream Computing Embedded systems SiliconBlue Technologies Electronic engineering Field-programmable gate array Fabless semiconductor companies
774	Power Management in Arria 10 Devices Add to Reading List Source URL: www.altera.com Language: English - Date: 2014-08-15 04:44:31 Electronics manufacturing Embedded systems Joint Test Action Group Integrated circuits Altera Field-programmable gate array Voltage regulator Power supply Linear regulator Electronics Electronic engineering Electromagnetism
775	1 Logic Array Blocks and Adaptive Logic Modules in Arria 10 Devices[removed] Add to Reading List Source URL: www.altera.com Language: English - Date: 2014-08-15 04:12:16 Integrated circuits Altera Application-specific integrated circuit Field-programmable gate array Electronic engineering Electronics Fabless semiconductor companies
776	Synopsys Synplify Support Add to Reading List Source URL: www.altera.com Language: English - Date: 2014-06-19 13:37:55 Electronic design Logic design Altera Quartus Logic synthesis Field-programmable gate array Altera VHDL Synopsys SystemVerilog Electronic engineering Electronic design automation Hardware description languages
777	4 Managing Device I/O Pins[removed]QII52013 Add to Reading List Source URL: www.altera.com Language: English - Date: 2014-08-12 19:20:10 Field-programmable gate array Graphics software VHDL Drawing pin PCB Electronic engineering Electronic design automation Altera Quartus
778	Recommended HDL Coding Styles Add to Reading List Source URL: www.altera.com Language: English - Date: 2014-08-12 19:19:16 Logic design Electronic design VHDL Field-programmable gate array Altera Quartus Verilog Logic synthesis Altera Application-specific integrated circuit Electronic engineering Hardware description languages Electronic design automation
779	Nios II 3C25 Microprocessor with LCD Controller Data Sheet DS[removed] © March 2009 Add to Reading List Source URL: www.altera.com Language: English - Date: 2009-04-22 16:48:21 Computer memory SDRAM Ethernet Media Independent Interface Nios II Field-programmable gate array Serial Peripheral Interface Bus Dynamic random-access memory Analog-to-digital converter Computer hardware Electronics Electronic engineering
780	Design Planning for Partial Reconfiguration Add to Reading List Source URL: www.altera.com Language: English Field-programmable gate array Electronic design automation Nios II ALGOL 68 Placement Joint Test Action Group Region-based memory management Partial re-configuration Electronic engineering Electronics Altera

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